cond *.multi 0 > *.tienum 0 = start *.genes 2 mod 1 add .readtie store *.genes 2 mod 1 add .tienum store .vtimer .tmemloc store stop cond *.tmemval 0 = *971 1 = *.genes 59 < *.robage 180 > *.numties 2 = start .mkvirus .tieloc store *.genes 1 add .tieval store stop cond *.tmemval 1 = *971 1 = *.numties 2 = start .vshoot .tieloc store 1 .tieval store stop cond *.robage 100 > *.robage 180 < *971 1 = start 5 .delgene store 95 .sharenrg store stop cond *.body 100 > *971 2 = start *.body 100 .fdbody store stop cond *.robage 0 = start 971 inc stop cond *.robage 0 > *.nrg 10000 > *.numties 0 = *971 1 = start 972 inc 10 .repro store stop cond *.robage 20 > *.numties 1 = *971 1 = start 972 inc 618 .aimdx store 10 .repro store stop cond *.robage 2 = *.multi 0 = *971 2 = start *972 .tie store stop cond *971 2 = *.body 100 > start *.body 100 sub .fdbody store stop cond *971 1 = *.nrg 20000 > start 100 .strbody store stop cond start 0 *0 *0 0 0 *0 *0 0 0 *0 0 0 *0 *0 0 0 *0 *0 stop cond start sub sgn 1 sub abs sgn mult store sub sgn 1 add sgn mult store sgn mult store sub sgn abs 1 sub abs mult store sub sgn 1 sub abs sgn mult inc stop cond start 0 *0 *0 0 *0 0 *0 *0 0 *0 *0 0 *0 *0 0 *0 0 *0 *0 stop cond start sub sgn 1 add sgn mult inc sgn mult inc sub sgn abs 1 sub abs mult inc sub sgn 1 sub abs sgn mult dec sub sgn 1 add sgn mult dec sgn mult dec sub sgn abs 1 sub abs mult dec stop cond start 0 *0 0 0 0 *0 0 0 0 0 0 0 *0 0 0 0 *0 0 stop cond start sub sgn 1 sub abs sgn mult store sub sgn 1 add sgn mult store sgn mult store sub sgn abs 1 sub abs mult store sub sgn 1 sub abs sgn mult inc stop cond start 0 *0 0 0 0 0 *0 0 0 *0 0 0 *0 0 0 0 0 *0 0 stop cond start sub sgn 1 add sgn mult inc sgn mult inc sub sgn abs 1 sub abs mult inc sub sgn 1 sub abs sgn mult dec sub sgn 1 add sgn mult dec sgn mult dec sub sgn abs 1 sub abs mult dec stop cond start *0 *0 *0 *0 0 *0 *0 *0 0 *0 *0 0 *0 *0 *0 0 *0 *0 stop cond start sub sgn 1 sub abs sgn mult store sub sgn 1 add sgn mult store sgn mult store sub sgn abs 1 sub abs mult store sub sgn 1 sub abs sgn mult inc stop cond start *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 stop cond start sub sgn 1 add sgn mult inc sgn mult inc sub sgn abs 1 sub abs mult inc sub sgn 1 sub abs sgn mult dec sub sgn 1 add sgn mult dec sgn mult dec sub sgn abs 1 sub abs mult dec stop cond start *0 *0 0 *0 0 *0 0 *0 0 0 *0 0 *0 0 *0 0 *0 0 stop cond start sub sgn 1 sgn mult store sub sgn 1 add sgn mult store sgn mult store sub sgn abs 1 sub abs mult store sub sgn 1 sub abs sgn mult inc stop cond start *0 *0 0 *0 0 *0 *0 0 *0 *0 0 *0 *0 0 *0 0 *0 *0 0 stop cond start sub sgn 1 add sgn mult inc sgn mult inc sub sgn abs 1 sub abs mult inc sub sgn 1 sub abs sgn mult dec sub sgn 1 add sgn mult dec sgn mult dec sub sgn abs 1 sub abs mult dec stop cond start 0 *0 *0 0 0 *0 *0 0 0 *0 0 0 *0 *0 0 0 *0 *0 stop cond start sub sgn 1 sub abs sgn mult store sub sgn 1 add sgn mult store sgn mult store sub sgn abs 1 sub abs mult store sub sgn 1 sub abs sgn mult inc stop cond start 0 *0 *0 0 *0 0 *0 *0 0 *0 *0 0 *0 *0 0 *0 0 *0 *0 stop cond start sub sgn 1 add sgn mult inc sgn mult inc sub sgn abs 1 sub abs mult inc sub sgn 1 sub abs sgn mult dec sub sgn 1 add sgn mult dec sgn mult dec sub sgn abs 1 sub abs mult dec stop cond start 0 *0 0 0 0 *0 0 0 0 0 0 0 *0 0 0 0 *0 0 stop cond start sub sgn 1 sub abs sgn mult store sub sgn 1 add sgn mult store sgn mult store sub sgn abs 1 sub abs mult store sub sgn 1 sub abs sgn mult inc stop cond start 0 *0 0 0 0 0 *0 0 0 *0 0 0 *0 0 0 0 0 *0 0 stop cond start sub sgn 1 add sgn mult inc sgn mult inc sub sgn abs 1 sub abs mult inc sub sgn 1 sub abs sgn mult dec sub sgn 1 add sgn mult dec sgn mult dec sub sgn abs 1 sub abs mult dec stop cond start *0 *0 *0 *0 0 *0 *0 *0 0 *0 *0 0 *0 *0 *0 0 *0 *0 stop cond start sub sgn 1 sub mult store sub sgn 1 add sgn mult store sgn mult store sub sgn abs 1 sub abs mult store sub sgn 1 sub abs sgn mult inc stop cond start *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 stop cond start sub sgn 1 add sgn mult inc sgn mult inc sub sgn abs 1 sub abs mult inc sub sgn 1 sub abs sgn mult dec sub sgn 1 add sgn mult dec sgn mult dec sub sgn abs 1 sub abs mult dec stop cond start *0 *0 0 *0 0 *0 0 *0 0 0 *0 0 *0 0 *0 0 *0 0 stop cond start sub sgn 1 sub abs sgn mult store sub sgn 1 add sgn mult store sgn mult store sub sgn abs 1 sub abs mult store sub sgn 1 sub abs sgn mult inc stop cond start *0 *0 0 *0 0 *0 *0 0 *0 *0 0 *0 *0 0 *0 0 *0 *0 0 stop cond start sub sgn 1 add sgn mult inc sgn mult inc sub sgn abs 1 sub abs mult inc sub sgn 1 sub abs sgn mult dec sub sgn 1 add sgn mult dec sgn mult dec sub sgn abs 1 sub abs mult dec stop cond start 0 *0 *0 0 0 *0 *0 0 0 *0 0 0 *0 *0 0 0 *0 *0 stop cond start sub sgn 1 sub abs sgn mult store sub sgn 1 add sgn mult store sgn mult store sub sgn abs 1 sub abs mult store sub sgn 1 sub abs sgn mult inc stop cond start 0 *0 *0 0 *0 0 *0 *0 0 *0 0 *0 *0 0 *0 *0 0 *0 *0 stop cond start sub sgn 1 add sgn mult inc sgn mult inc sub sgn abs 1 sub abs mult inc sub sgn 1 sub abs sgn mult dec sub sgn 1 add sgn mult dec sgn mult dec sub sgn abs 1 sub abs mult dec stop cond start 0 *0 0 0 0 *0 0 0 0 0 0 0 *0 0 0 0 *0 0 stop cond start sub sgn 1 sub abs sgn mult store sub sgn 1 add sgn mult store sgn mult store sub sgn abs 1 sub abs mult store sub sgn 1 sub abs sgn mult inc stop cond start 0 *0 0 0 0 0 *0 0 0 *0 0 0 *0 0 0 0 0 *0 0 stop cond start sub sgn 1 add sgn mult inc sgn mult inc sub sgn abs 1 sub abs mult inc sub sgn 1 sub abs sgn mult dec sub sgn 1 add sgn mult dec sgn mult dec sub sgn abs 1 sub abs mult dec stop cond start *0 *0 *0 *0 0 *0 *0 *0 0 *0 *0 0 *0 *0 *0 0 *0 *0 stop cond start sub sgn 1 abs sgn sub abs sgn mult store sub sgn 1 abs sgn add sgn mult store sgn mult store sub sgn abs 1 sub abs mult store sub sgn 1 sub abs sgn mult inc stop cond start *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 *0 stop cond start sub sgn 1 add sgn mult inc sgn mult inc sub sgn abs 1 sub abs mult inc sub sgn 1 sub abs sgn mult dec sub sgn 1 add sgn mult dec sgn mult dec sub sgn abs 1 sub abs mult dec stop cond start *0 *0 0 *0 0 *0 0 *0 0 0 *0 0 *0 0 *0 0 *0 0 stop cond start sub sgn 1 sub abs sgn mult store sub sgn 1 add sgn mult store sgn mult store sub sgn abs 1 sub abs mult store sub sgn 1 sub abs sgn mult inc stop cond start *0 *0 0 *0 0 *0 *0 0 *0 *0 0 *0 *0 0 *0 0 *0 *0 0 stop cond start sub sgn 1 add sgn mult inc sgn mult inc sub sgn abs 1 sub abs mult inc sub sgn 1 sub abs sgn mult dec sub sgn 1 add sgn mult dec sgn mult dec sub sgn abs 1 sub abs mult dec stop end